when you declare a NMM (or other type)  clock with a fake divisor/multiplier and AW_CLK_FACTOR_FIXED flag even if the number of bits/width for the clock is 0 the value is still set to the register (at the declared shift position) because the value returned by aw_clk_factor_get_value for AW_CLK_FACTOR_FIXED is not masked
when setting the clock frequency this is causing undesired results
the fix would be that aw_clk_factor_get_value to mask the value for 
AW_CLK_FACTOR_FIXED


NM_CLK(spdif_clk,
    CLK_SPDIF, "spdif", spdif_parents,          /* id, name, parents */
    0xC0,                                       /* offset */
    0, 0, 1, AW_CLK_FACTOR_FIXED,               /* n factor (fake); */
    0, 4, 0, 0,                                 /* m factor */
    0, 0,                                       /* mux */
    31,                                         /* gate */
    AW_CLK_HAS_GATE);                           /* flags */

bit 0 will be forced to 1 by the n factor and will alter the m factor